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1. ethernet ethernet Public

   Forked from lowRISC/ethernet

   Open-source Ethenet interface for Xilinx FPGA. Exposes RGMII interface and an AXI for connection to bus.

   SystemVerilog

2. DyNNSoC DyNNSoC Public

   Verilog 1

3. thomas6785.github.io thomas6785.github.io Public

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