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60 changes: 16 additions & 44 deletions Cargo.lock

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2 changes: 1 addition & 1 deletion Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ sbi-rt = "0.0.3"
[target.'cfg(target_arch = "x86_64")'.dependencies]
linux-boot-params = { version = "0.18", optional = true }
multiboot = { version = "0.8", optional = true }
uart_16550 = "0.4"
uart_16550 = "0.8"
x86_64 = { version = "0.15", default-features = false, features = ["instructions"] }

[target.'cfg(target_os = "uefi")'.dependencies]
Expand Down
20 changes: 12 additions & 8 deletions src/arch/x86_64/console.rs
Original file line number Diff line number Diff line change
@@ -1,21 +1,25 @@
use uart_16550::SerialPort;
use uart_16550::backend::PioBackend;
use uart_16550::{Config, Uart16550};

pub struct Console {
serial_port: SerialPort,
uart: Uart16550<PioBackend>,
}

impl Console {
pub fn write_bytes(&mut self, bytes: &[u8]) {
for byte in bytes.iter().copied() {
self.serial_port.send(byte);
}
self.uart.send_bytes_exact(bytes);
}
}

impl Default for Console {
fn default() -> Self {
let mut serial_port = unsafe { SerialPort::new(0x3F8) };
serial_port.init();
Self { serial_port }
let base_port = 0x3f8;
let mut uart = unsafe { Uart16550::new_port(base_port).unwrap() };
uart.init(Config::default()).ok();
// Once we have a fallback destination for output,
// we should log any error above and run
// `test_loopback` and `check_connected` here.

Self { uart }
}
}
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