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HBM Timing Violations on every sp=HBM design

Status: Open.

#132 In Xilinx/SLASH;

· merkelmarrow opened on Jun 16, 2026

slashkit: build_all.sh calls missing ./build_rp1.sh (breaks RP1 firmware baking)

Status: Open.

#131 In Xilinx/SLASH;

· amd-vserbu opened on Jun 16, 2026

slashkit: generate_base_pdi_with_aved references undefined config.resources_dir

Status: Open.

#130 In Xilinx/SLASH;

· amd-vserbu opened on Jun 16, 2026

Root design build fails during synthesis due to missing elf files

bugSomething isn't workingSomething isn't working

Status: Open.

#117 In Xilinx/SLASH;

· taraxacum45e9a opened on Jun 12, 2026

Silent static shell timing violations

bugSomething isn't workingSomething isn't working

Status: Open.

#111 In Xilinx/SLASH;

· quetric opened on Jun 9, 2026

Optionally insert performance monitors into the user logic design

Status: Open.

#107 In Xilinx/SLASH;

· quetric opened on Jun 9, 2026

Explicit API support for output registers in VRT

enhancementNew feature or requestNew feature or request

Status: Open.

#105 In Xilinx/SLASH;

· JOOpdenhoevel opened on Jun 4, 2026

Achieved clock frequency is never read back into system_map.xml

Status: Open.

#99 In Xilinx/SLASH;

· JOOpdenhoevel opened on May 26, 2026

--clock-hz is not propagated as a Vivado timing constraint

bugSomething isn't workingSomething isn't working

Status: Open.

#98 In Xilinx/SLASH;

· JOOpdenhoevel opened on May 26, 2026

Search in docs does not work

documentationImprovements or additions to documentationImprovements or additions to documentation

Status: Open.

#94 In Xilinx/SLASH;

· deffel opened on May 20, 2026

IOCTL command numbers encode struct size, defeating ABI versioning

bugSomething isn't workingSomething isn't working

Status: Open.

#84 In Xilinx/SLASH;

· JOOpdenhoevel opened on May 15, 2026

Make slashkit publishable on PyPI

Status: Open.

#78 In Xilinx/SLASH;

· JOOpdenhoevel opened on May 7, 2026