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Add tap controls; refactor AC_branches.jl - #239

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ac/transformer-control
Aug 24, 2026
Merged

Add tap controls; refactor AC_branches.jl#239
jd-lara merged 41 commits into
mainfrom
ac/transformer-control

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@acostarelli

@acostarelli acostarelli commented Aug 15, 2026

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Add support for tap control objectives, and large refactoring of AC_branches.jl

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Pull request overview

This PR refactors transformer tap handling by moving tap control behavior into the native branch construction path (gated by an enable_controls attribute and per-circuit TransformerControlObjective), while reorganizing/renaming related tests and tightening network-reduction “irreducible bus” logic for controlled devices and outages.

Changes:

  • Add tap-control variable/constraint plumbing to the native AC/DC branch models (including new voltage- and reactive-flow control constraints).
  • Restructure and expand transformer tap tests into separate “fixed tap” vs “controls” suites; remove legacy/disabled tap-control test files.
  • Refactor irreducible-bus selection to incorporate outage-monitored/outaged components and controllable transformers.

Reviewed changes

Copilot reviewed 21 out of 21 changed files in this pull request and generated 3 comments.

Show a summary per file
File Description
test/test_voltage_control_tap_models.jl Removes legacy VoltageControlTap model tests.
test/test_transformer_fixed_tap.jl Adds fixed (off-nominal) tap physics tests across native models.
test/test_transformer_controls.jl Adds transformer control-objective tests (tap variables + control bands).
test/test_power_flow_in_the_loop.jl Removes commented PhaseShiftingTransformer PFitL test block.
test/test_postcontingency_mixed_outage_axes.jl Updates outage pinning test to call the new helper.
test/test_native_transformer_tap.jl Removes older fixed-tap + coefficient ground-truth tests (now relocated).
test/test_native_tapcontrol.jl Removes disabled TapControl formulation tests.
test/test_native_network_reductions.jl Removes commented PhaseAngleControl and tap regulated-bus error test blocks.
test/test_native_lpacc_model.jl Re-enables/updates LPACC shunt validation gate test.
test/test_native_dcp_acp_models.jl Re-enables use_slacks validation test for StaticBranchUnbounded.
test/test_device_branch_constructors.jl Removes commented phase-shifting DC power flow test block.
test/runtests.jl Removes DISABLED_TESTS entries (now empty).
test/Project.toml Removes PowerFlows from test deps/sources (but tests still reference it).
test/includes.jl Comments out using PowerFlows and const PFS = PowerFlows (but tests still reference PFS).
src/PowerOperationsModels.jl Exports ReactivePowerFlowControlConstraint.
src/network_models/instantiate_network_model.jl Refactors irreducible-bus selection; adds outage + controllable-transformer pinning.
src/core/network_formulations.jl Removes old regulated-voltage/tap-current-form traits.
src/core/constraints.jl Adds ReactivePowerFlowControlConstraint type.
src/ac_transmission_models/voltage_control_tap_models.jl Removes legacy VoltageControlTap formulation implementation.
src/ac_transmission_models/branch_constructor.jl Wires new tap-control variables/constraints into branch construction stages.
src/ac_transmission_models/AC_branches.jl Implements tap-control variables, voltage/reactive control constraints, and tap-aware flow equations.
Suppressed comments (3)

test/includes.jl:39

  • PFS is still referenced by active tests (e.g. test/test_power_flow_in_the_loop.jl), but the alias is commented out. This will raise UndefVarError: PFS not defined at runtime.
const PSY = PowerSystems
const POM = PowerOperationsModels
const IOM = InfrastructureOptimizationModels
#const PFS = PowerFlows
const PSB = PowerSystemCaseBuilder
const PNM = PowerNetworkMatrices

test/Project.toml:23

  • PowerFlows is removed from [deps], but multiple active tests (not just commented blocks) still rely on it via the PFS alias (see test/test_power_flow_in_the_loop.jl). This will fail to instantiate the test environment.

This issue also appears on line 34 of the same file.

MathOptInterface = "b8f27783-ece8-5eb3-8dc8-9495eed66fee"
ParallelTestRunner = "d3525ed8-44d0-4b2c-a655-542cee43accc"
Pkg = "44cfe95a-1eb2-52ea-b672-e2afdf69b78f"
PowerNetworkMatrices = "bed98974-b02a-5e2f-9fe0-a103f5c450dd"
PowerOperationsModels = "bed98974-b02a-5e2f-9ee0-a103f5c450dd"
PowerSystemCaseBuilder = "f00506e0-b84f-492a-93c2-c0a9afc4364e"
PowerSystems = "bcd98974-b02a-5e2f-9ee0-a103f5c450dd"

test/Project.toml:40

  • PowerFlows is removed from [sources], but it’s still required by the active PFitL tests. Without a source entry (when using custom git sources for the other Sienna packages), resolving the test environment may pull an incompatible version or fail outright.
[sources]
InfrastructureOptimizationModels = {rev = "main", url = "https://github.com/Sienna-Platform/InfrastructureOptimizationModels.jl"}
InfrastructureSystems = {rev = "IS4", url = "https://github.com/Sienna-Platform/InfrastructureSystems.jl"}
PowerNetworkMatrices = {rev = "psy6", url = "https://github.com/Sienna-Platform/PowerNetworkMatrices.jl"}
PowerSystemCaseBuilder = {rev = "psy6", url = "https://github.com/Sienna-Platform/PowerSystemCaseBuilder.jl"}
PowerSystems = {rev = "psy6", url = "https://github.com/Sienna-Platform/PowerSystems.jl"}


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Comment thread test/includes.jl
Comment on lines 1207 to 1211
function _validate_controlled_branch_not_reduced(
network_model::NetworkModel,
devices::IS.FlattenIteratorWrapper{T},
formulation_name::String,
::Type{T},
controlled_names,
) where {T <: PSY.ACTransmission}

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transformer_models.jl isn't used. I will remove it when I implement phase shifting.

I believe a parallel merge is the only merge that can happen; series merges are blocked by specifying irreducible buses.

Comment on lines +231 to +235
for circuit in PSY.get_circuits(transformer)
_control_enabled(circuit) || continue
_push_component_buses!(irreducible_buses, circuit)
push!(irreducible_buses, PSY.get_regulated_bus_number(circuit))
end

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I think the convention we're going to go for now is the regulated bus number must always be a valid bus number, so 0 doesn't carry special importance.

That said, I agree maybe we shouldn't be pinning the regulated bus on all controls.

@jd-lara
jd-lara changed the base branch from main to jd/network_matrix_consolidation August 15, 2026 23:29
@jd-lara

jd-lara commented Aug 15, 2026

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@acostarelli I stacked this on top of the PR with the network changes

@jd-lara
jd-lara force-pushed the jd/network_matrix_consolidation branch from ce24265 to 7ebf176 Compare August 16, 2026 16:22

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Implementation review

Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/core/constraints.jl Outdated
Comment thread src/network_models/instantiate_network_model.jl Outdated
Comment thread src/network_models/instantiate_network_model.jl Outdated

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Tests review

Have not checked that old tap tests that should be ported were ported.

Comment thread test/test_native_dcp_acp_models.jl
Comment thread test/test_power_flow_in_the_loop.jl
Comment thread test/test_native_transformer_tap.jl
Comment thread test/test_transformer_controls.jl Outdated
Comment thread test/test_transformer_controls.jl Outdated
Comment thread test/test_transformer_controls.jl Outdated
Comment thread test/test_transformer_controls.jl Outdated
Comment thread test/test_transformer_controls.jl Outdated
Comment thread test/test_transformer_controls.jl Outdated
Comment thread test/test_transformer_controls.jl Outdated

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Test port check. Seems fine.

Comment thread test/test_voltage_control_tap_models.jl
Comment thread test/test_voltage_control_tap_models.jl
Comment thread test/test_voltage_control_tap_models.jl
Comment thread test/test_voltage_control_tap_models.jl
Comment thread test/test_voltage_control_tap_models.jl
Comment thread test/test_voltage_control_tap_models.jl
Comment thread test/test_native_tapcontrol.jl
Comment thread test/test_native_tapcontrol.jl
Comment thread test/test_native_transformer_tap.jl
Comment thread test/test_native_transformer_tap.jl
@acostarelli
acostarelli force-pushed the ac/transformer-control branch from dd4ad35 to 7368dcd Compare August 17, 2026 18:27
Comment thread test/test_transformer_controls.jl Outdated
Base automatically changed from jd/network_matrix_consolidation to main August 18, 2026 03:43
Anthony Costarelli added 7 commits August 20, 2026 13:52
fold branch_rate_bounds! into _branch_variable_bounds dispatches run
during add_variables!, cleaner because variable bounds aren't changed
later

get_min_max and min_max_flow_limits -> _flow_limits(rep), symmetric line
rating or possibly-asymmetric monitored line limits.

reactive control only controls from_bus flow, I believe.

delete transformer_models.jl

better control validation: warn if a control is unsupported, treat as if
uncontrolled for reductions. additionally compare regulated bus against
VSCs in template validation
own VoltageControlConstraint now
fixed slack variable bounds

added types to helpers because i keep passing in types that i dont want
to accept and getting silent errors

check for parallel reduction before checking if branch uses the control
variable, because it obviously doesn't use the control if it's a
reduction.

add current control bounds check

check for constraints in tests

test no tap on dc

add support for StaticBranchBounds, and coverage

test _tapped_admittance against DC PF
my _branch_variable_bounds dispatch structure is a bit confusing,
probably should be revised, but for now this fixes the infeasibilites.
@acostarelli

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@m-bossart I addressed your reviews. I have some responses to the one from Slack:
7. Should reactive power control only constrain the from-to flow? This is what I changed it to. Previously it was constraining both.
9. I added validation that the regulated bus number is valid, but I think this should happen in PSY
12. I'm choosing not to use regulated_voltage.jl because it feels quite overkill and my solution is cleaner IMO.
13. Rather than restoring the test with "hand-computed" susceptances, I have the test compare POM's calculated admittance against a DC PF, to ensure tap is included correctly

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codecov Bot commented Aug 21, 2026

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A few general comments.

  1. The rating_b thing is the most concerning, I think that is a real regression that is made in this PR. It might be that we need better test coverage there.
  2. There is still a bunch of commented/stale code that is no longer needed after this refactor. Search for "psy6: disabled pending transformer refactor". We can leave some of the code related to phase shifting for now, but some of that can be cleaned up.
  3. Update the documentation on the transformer formulations. All of the information there is now stale.
  4. TapRatioVariable's exported docstring
    (core/variables.jl:65-66) reads "for a the disabled VoltageControlTap formulation". It references a deleted type on the public docstring.
  5. I think it is OK to not reuse regulated_voltage.jl because we are implementing a voltage band and not fixing a specific value. But we should do some cleanup to that file to remove the functionality that was originally included for transformers (including the documentation).

Comment thread test/test_power_flow_in_the_loop.jl
_branch_rating(rep.branch, model)

# TODO: SC branches don't use the RepBranch API but they need rating_b, so
# move this or change SC to use this API.

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_branch_rating_b is dispatching to just get_rating. This will return the normal rating even when there is an emergency rating defined. Something wrong here.

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Typo

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But yes coverage is not great

_branch_rating(rep::RepresentativeBranch, model::DeviceModel) =
_branch_rating(rep.branch, model)

# TODO: SC branches don't use the RepBranch API but they need rating_b, so

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Can we address this now and not leave a TODO? What are the limitations to using RepresentativeBranch with SC models?

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Seems like that whole _check_time_series method in add_parameters.jl isn't covered because it doesn't even have a correct _branch_rating signature.

Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/AC_branches.jl Outdated
Comment thread src/ac_transmission_models/branch_constructor.jl Outdated
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@m-bossart I addressed your reviews. I have some responses to the one from Slack: 7. Should reactive power control only constrain the from-to flow? This is what I changed it to. Previously it was constraining both. 9. I added validation that the regulated bus number is valid, but I think this should happen in PSY 12. I'm choosing not to use regulated_voltage.jl because it feels quite overkill and my solution is cleaner IMO. 13. Rather than restoring the test with "hand-computed" susceptances, I have the test compare POM's calculated admittance against a DC PF, to ensure tap is included correctly

7., 12., 13. Ok - seems reasonable.
9. Yes, we need to make the changes in the parser/PSY/schemas to change the interpretation of the regulated bus numbers.

@m-bossart
m-bossart self-requested a review August 23, 2026 20:42
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@jd-lara Only the pre-existing test failures are failing locally (services related)

@jd-lara
jd-lara merged commit eb9562f into main Aug 24, 2026
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5 participants