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NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed #15
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Are your connections like nf0-tx -> nf1-rx , nf0-rx <- nf1-tx and nf2-tx -> nf3-rx , nf2-rx <- nf3-tx ?
- Sure,connections is nf0-tx -> nf1-rx , nf0-rx <- nf1-tx and nf2-tx -> nf3-rx , nf2-rx <- nf3-tx,but it still shows loopback test failed. I am very anxious and don't know why the loopback test failed. Can you give some suggestions. Thanks…--------------原始邮件-------------- 发件人："Salvator Galea ***@***.***>; 发送时间：2021年3月26日(星期五) 晚上10:01 收件人："NetFPGA/NetFPGA-public" ***@***.***>; 抄送："Carl-arch-tech ***@***.***>;"Author ***@***.***>; 主题：Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) ----------------------------------- Are your connections like nf0-tx -> nf1-rx , nf0-rx <- nf1-tx and nf2-tx -> nf3-rx , nf2-rx <- nf3-tx ? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub, or unsubscribe.
Is it a constant failure? meaning that out of 10 tries all of them are failing?
- Yes,the loopback test has never pass.…--------------原始邮件-------------- 发件人："Salvator Galea ***@***.***>; 发送时间：2021年3月26日(星期五) 晚上10:23 收件人："NetFPGA/NetFPGA-public" ***@***.***>; 抄送："Carl-arch-tech ***@***.***>;"Author ***@***.***>; 主题：Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) ----------------------------------- Is it a constant failure? meaning that out of 10 tries all of them are failing?这是一个不断的失败吗？这意味着在10次尝试中，所有的尝试都失败了？ —&mash； You are receiving this because you authored the thread.您收到此消息是因为您编写了线程。 Reply to this email directly, 直接回复这封电子邮件，view it on GitHub在GitHub上查看, or ，或unsubscribe取消订阅.
Have you checked the hardware test for the reference nic? Does it fail also?
- I will check it,thanks…--------------原始邮件-------------- 发件人："Salvator Galea ***@***.***>; 发送时间：2021年3月26日(星期五) 晚上10:44 收件人："NetFPGA/NetFPGA-public" ***@***.***>; 抄送："Carl-arch-tech ***@***.***>;"Author ***@***.***>; 主题：Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) ----------------------------------- Have you checked the hardware test for the reference nic? Does it fail also? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub, or unsubscribe.
- Hello, You can also have a look here: https://github.com/orgs/NetFPGA/teams/sume-beta/discussions/3 Marcin…On Fri, Mar 26, 2021 at 2:49 PM Carl-arch-tech ***@***.***> wrote: I will check it,thanks --------------原始邮件-------------- 发件人："Salvator Galea ***@***.***>; 发送时间：2021年3月26日(星期五) 晚上10:44 收件人："NetFPGA/NetFPGA-public" ***@***.***>; 抄送："Carl-arch-tech ***@***.***>;"Author ***@***.***>; 主题：Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) ----------------------------------- Have you checked the hardware test for the reference nic? Does it fail also? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub, or unsubscribe. — You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub <#15 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ADI5DXLBV527D4OROVZAA7DTFSNH5ANCNFSM4Z2T4YYQ> .
- Hi， Sorry，but I can't open it. Carl Zhang/ 张兢轩 业务代表 深圳市有芯电子有限公司 电话: +86 0755-8260-2888 ext8456 传真：+86 0755-8260-2666 ext8456 手机：+86 18380804436 ***@***.*** 发件人： RIC-ZJX 发送时间： 2021-03-26 22:49 收件人： netfpga/netfpga-public 主题： 回复:Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) I will check it,thanks…--------------原始邮件-------------- 发件人："Salvator Galea ***@***.***>; 发送时间：2021年3月26日(星期五) 晚上10:44 收件人："NetFPGA/NetFPGA-public" ***@***.***>; 抄送："Carl-arch-tech ***@***.***>;"Author ***@***.***>; 主题：Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) ----------------------------------- Have you checked the hardware test for the reference nic? Does it fail also? — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub, or unsubscribe.
We download and run this script and got the log file(murugan.log).
We running below commands and got the log file (system.log) .
user@your-machine: sudo -i
root@your-machine:~# for i in {1..39}; do dmidecode -t $i >> system.log; doneKindly note: our system is Ubuntu 18.04 rather than Ubuntu 14.04,16.04,20.04.
Our questions are:
- Can you finger out the problems according the log files?
- Does the version of the Ubuntu 18.04 affect the test results？
Can u view this discussion ?
- From the logs I cannot spot something unfortunately.
- If you have downloaded all the required libs and the correct python version, I believe u should not have any problem with 18.04
Can you try to run the hardware tests for other reference projects? (like reference_nic, reference_switch )
In the loopback test. We successed when we test with 64kb test data. But we failed when we test with bigger data like 1600kb.
In addition, I‘m try to run the hardware tests for reference_nic. But it failed when we test loop back maxsize. Is it a hardware issue or a software issue?
Can you give some suggestions?
- Dear， In the loopback test. We successed when we test with 64kb test data. But we failed when we test with bigger data like 1600kb. In addition, I‘m try to run the hardware tests for reference_nic. But it failed when we test loop back maxsize. Is it a hardware issue or a software issue? Can you give some suggestions? Carl Zhang/ 张兢轩 业务代表 深圳市有芯电子有限公司 电话: +86 0755-8260-2888 ext8456 传真：+86 0755-8260-2666 ext8456 手机：+86 18380804436 ***@***.*** From: Salvator Galea Date: 2021-04-01 21:05 To: NetFPGA/NetFPGA-public CC: Carl-arch-tech; Author Subject: Re: [NetFPGA/NetFPGA-public] NetFPGA-SUME Virtex-7 FPGA Development Board:Test 10G loopback was Failed (#15) Can u view this discussion ? From the logs I cannot spot something unfortunately. If you have downloaded all the required libs and the correct python version, I believe u should not have any problem with 18.04 Can you try to run the hardware tests for other reference projects? (like reference_nic, reference_switch ) — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub, or unsubscribe.
I bought the 410-301(NetFPGA-SUME Virtex-7 FPGA Development Board)
As our pictures show：the board configured four 10G optical modules.
The driver of sume-riffa has been loaded, and we can see four network ports nf0~nf3 via lsconfig command.
The problem is we failed when we test the 10G loopback with the Github's Acceptance Test Project.
Anyone have good idea for it？