[OMNIML-5899] Add IQ quantization codecs and backend - #2446
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Included review availability: Your plan provides up to 12 included reviews per hour; 9 remain after this review. 📝 WalkthroughWalkthroughThe change adds GGML IQ1_S and IQ2_XS quantization, dequantization, fake quantization, backend registration, shared caching and validation, package exports, licensing metadata, and unit and CUDA tests. ChangesGGML quantization support
Priority: ➖ Normal Estimated code review effort: 4 (Complex) | ~60 minutes Change: Feature Sequence Diagram(s)sequenceDiagram
participant Quantizer
participant ggml_fake_quant
participant IQCodec
participant PackedWeights
Quantizer->>ggml_fake_quant: provide IQ format and chunk size
ggml_fake_quant->>IQCodec: quantize input blocks
IQCodec->>PackedWeights: produce GGML payload and shape metadata
PackedWeights->>IQCodec: provide cached or new payload
IQCodec->>Quantizer: return reconstructed fake-quantized tensor
Merge Risk: 🔵 Low · up to Extremely large finite float64 weights can be quantized incorrectly on CPU/fallback paths and differ from CUDA output. This is a bounded edge case but should be corrected before relying on float64 IQ2_XS quantization. 🚥 Pre-merge checks | ✅ 5 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (5 passed)
✨ Finishing Touches 💡 1📝 Generate docstrings 💡
🧪 Generate unit tests (beta)
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/claude review |
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![claude[bot]](https://avatars.githubusercontent.com/in/1236702?s=60&v=4){kind=small}
| if weight.is_cuda: | ||
| from .. import extensions | ||
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| get_extension = getattr(extensions, "get_cuda_ext_iq1_s", None) | ||
| extension = get_extension() if get_extension is not None else None | ||
| if extension is not None: | ||
| packed = extension.pack(blocks, grid) | ||
| packed_shape = ( |
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[SUGGESTION] This CUDA fast path is unreachable dead code today, and the getattr probe will fail silently rather than loudly when the kernels land.
modelopt/torch/quantization/extensions.py declares __all__ = ["get_cuda_ext", "get_cuda_ext_fp8", "get_cuda_ext_mx", "precompile"] — there is no get_cuda_ext_iq1_s (nor get_cuda_ext_iq2_xs), so get_extension is always None and the branch never executes. CONTRIBUTING's Remove dead code applies, and the PR description already scopes native kernels to a later stacked PR.
The worse property is the failure mode after those kernels land: getattr(extensions, "<name>", None) means any rename or typo in the accessor silently degrades to the multi-minute Python search with no warning — the exact bug class that's hardest to notice, since results stay correct.
Suggested fix: drop the block from this PR and add a direct import in the kernel PR, so a missing symbol is an ImportError at load time rather than a silent slow path:
from ..extensions import get_cuda_ext_iq1_s
...
extension = get_cuda_ext_iq1_s() if weight.is_cuda else None
if extension is not None:
...Same for iq2_xs.py:234.
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Claude review — IQ quantization codecs and backend
Scope reviewed: full PR (8 files, +734/-0). All 6 modelopt/ files read in full; .pre-commit-config.yaml and LICENSE checked against the CONTRIBUTING third-party-code procedure. Integration points verified in nn/modules/tensor_quantizer.py (register_quant_backend, _fake_quantize dispatch), config.py (num_bits / backend / backend_extra_args fields, validate_num_bits), and extensions.py.
Findings
CRITICAL: 0 · IMPORTANT: 4 · SUGGESTION: 4
| Severity | Location | Issue |
|---|---|---|
| IMPORTANT Compatibility | ggml/iq2_xs.py:286 |
Per-16 scale factor may be the IQ2_XXS constant rather than the IQ2_XS one, i.e. a possible 2x mismatch vs. llama.cpp |
| IMPORTANT Algorithm | ggml/iq1_s.py:167 |
torch.full without dtype lets the search accumulator degrade to bf16 under set_default_dtype |
| IMPORTANT Performance | ggml/common.py:36 |
torch.isfinite(weight).all() in a Python branch: device sync plus full tensor scan every forward |
| IMPORTANT Performance | ggml/common.py:53, iq1_s.py:226 |
Device-side shape tensor forces a second sync per call; block_chunk_size=64 default is launch-bound |
| SUGGESTION | ggml/iq1_s.py:240-247 |
Unreachable CUDA fast path; the getattr probe fails silently instead of loudly |
| SUGGESTION | ggml/iq1_s.py:298-301 |
search_impl option is inert and has two undocumented aliases |
| SUGGESTION | ggml/iq2_xs.py:165-166 |
Undocumented magic constants; docstring wrongly claims canonical upstream search |
| SUGGESTION | quantization/__init__.py:30-33 |
Import comment omits the actual reason for the import_module indirection |
Most impactful
The IQ2_XS scale factor is the finding worth resolving before the export PR. The codec is internally consistent — the encoder normalization amax / 166.625 is exactly the max of the decoder / 8.0 formula, since 43 * 31 / 8 == 166.625 — so nothing in this PR misbehaves. The concern is the interop contract the docstrings promise (a GGML-compatible block_iq2_xs payload), because upstream applies different constants to the two IQ2 variants: iq2_xxs uses db = d * (0.5f + ls) * 0.25f, giving d * (2*ls+1) * m, which is what this code implements, while iq2_xs uses db = 0.125f * (0.5f + ls), giving half that. Worth re-deriving against gguf-py/gguf/quants.py at the pinned revision. I flagged rather than asserted this: there is no network access in this environment, so I could not run the comparison. Notably IQ1_S has no such ambiguity — _IQ1_S_NATIVE_MAX = 16.875 = 15 * 1.125 matches the upstream dl * (grid[j] + delta) exactly.
The two hot-path sync findings matter because iq*_fake_quant re-runs the entire encode on every forward pass, so each cost is paid per training/calibration step rather than once at conversion. Three items compound: an isfinite scan plus sync, a .cpu().tolist() sync on a 2-element CUDA tensor, and a Python loop nest of ~256 (IQ1_S) / ~128 (IQ2_XS) inner iterations per 64-block chunk. For a single 4096 x 14336 MLP weight that is roughly 900k inner iterations per call.
What checked out
I traced the block math end-to-end against the GGML layouts and found the core codec correct:
- Byte layouts. IQ1_S
2 + 32 + 16 = 50and IQ2_XS2 + 64 + 8 = 74; little-endian FP16d, interleaved lo/hi byte slicing (34:50:2/35:50:2,2:66:2/3:66:2), 11-bit IQ1_S entries split 8-low / 3-high acrossqsandqh, and the(qh >> 3*l) & 7/(qh >> 12) & 7/qh & 0x8000field packing all round-trip correctly between encoder and decoder. - The least-squares expansions are exact, not approximate. IQ1_S:
sum x_j (g_j + delta) = dot + delta*xsumandsum (g_j + delta)^2 = gnorm + 2*delta*gsum + 8*delta^2are both correct. IQ2_XS: sign flips leavexnormandscale^2 * qnorminvariant, so adjusting only the dot term is exact, anddot - 2*min(|x| * g)correctly prices the forced flip. - Scale grouping matches the formats. IQ1_S groups 4 vectors per
qhword (reshape(bc, 8, 4, 16)); IQ2_XS groups 2 vectors per 4-bit scale (reshape(bc, 16, 2, 16), low nibble to the even pair). Both match the upstreamdb[l/2]andqh[ib]semantics. - IQ2_XS sign parity. The encoder flips the weakest lane when the negative count is odd, guaranteeing even parity so dropping bit 7 is lossless; the decoder reconstructs bit 7 by XOR-folding the low 7. That is a correct inline equivalent of
ksigns_iq2xs, and the two sides agree (both useargmin(|x| * grid)). - Tie-breaking. Strict
<across codebook tiles plus first-indexminsemantics preserves the lowest grid index on equal error, matching both the comment and the stated CUDA key. - Straight-through gradient.
inputs + (reconstructed - inputs).detach()over a@torch.no_grad()encode/decode is the right construction. - Mode and state. No new mode and no
modelopt_stateschema change.num_bits="iq1_s"is safe:QuantizerAttributeConfig.num_bitsis already typedint | tuple[int, int] | str, andvalidate_num_bitsshort-circuits whenbackend is not None, so the string round-trips through Pydantic serialization with no compat shim needed. - Import cost.
_grid_bytes()is@cached behindiq*_grid(), so the eagermtqtoggmlimport only materializes string literals — no codebook decode or device allocation at load time. - License attribution. All four CONTRIBUTING steps are satisfied: source link with commit hash, MIT text, then the NVIDIA header;
SPDX-License-Identifier: Apache-2.0 AND MIT; ggml authors added to the MIT section ofLICENSE; both files excluded from theinsert-licensehook.
Smaller notes (no inline comment)
iq1_s.pyandiq2_xs.pyare ~90% structurally identical:_grid_bytes/iq*_grid/_GRID_CACHE, thepacked_shapetuple (built twice within eachquantize_*), the CUDA probe, and thefake_quantwrapper. The genuinely per-format parts are just_encode_blocksand the byte layout. Worth consolidating the scaffolding intocommon.pybefore three more formats arrive (CONTRIBUTING: keep a single source of truth).backend.py::ggml_fake_quantdispatches onnum_bits, then eachiq*_fake_quantre-checks the same value. One of the two checks is redundant.- No tests land here. The PR scopes them to a follow-up, which is reasonable for a stack, but note the coverage gate — and that a bit-exact round-trip against the
ggufreference decoder is what would settle the IQ2_XS scale question, so it is worth making that the first test in the follow-up rather than a Python-only self-consistency check, which passes either way.
Risk assessment
Low-to-moderate, and well contained. Nothing here changes an existing code path: the package is purely additive, registers one new opt-in backend name, and is reachable only when a user explicitly sets backend="ggml". The block math is sound, so the fake-quant path should produce correct results as-is. Residual risk is concentrated in the GGML byte-level interop contract, which becomes load-bearing in the export PR rather than this one, and in hot-path cost, which shows up as slow QAT rather than wrong numbers. All eight findings are local, mechanical fixes.
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Codec bit-layouts match the llama.cpp block_iq1_s/block_iq2_xs definitions as far as I can check, but the "backend" half of the PR is untested and one GPU assertion is tautological, so this needs another pass.
Needs action:
- Fix the CUDA/PyTorch parity assertion in
tests/gpu/torch/quantization/test_iq1_s_cuda.py:40(and the IQ2_XS twin) —dispatchedalso comes from the extension, so nothing compares the kernel against_encode_blocks. See inline comment. - Add a CPU test driving
backend="ggml"throughTensorQuantizer/mtq.quantize;ggml/backend.pyand the package-level registration have no coverage today. - Add a golden payload cross-checked against llama.cpp output for one fixed input — current tests only round-trip through this PR's own dequantizer, so a layout/scale error would pass.
- Explain in the PR body why the codecs are a new
ggml/package rather thanBaseQuantizedTensorsubclasses inmodelopt/torch/quantization/qtensor/, which already owns block pack/unpack. - Get OSRB/licensing sign-off: the ggml MIT codebook and the
LICENSEentry are a legal call, not a bot approval.
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| assert packed.shape == (8, 1, 50) | ||
| assert torch.equal(packed, packed_again) | ||
| assert torch.equal(packed, dispatched) |
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Bot comment.
dispatched is produced by quantize_iq1_s(weight), which on a CUDA tensor goes through the same get_cuda_ext_iq1_s().pack() call as packed — so this assertion only proves the extension is deterministic (already covered by packed_again). The valuable check is kernel vs. reference encoder: force the PyTorch path (as test_iq1_s_cuda_falls_back_to_pytorch_encoder does via monkeypatch) and assert byte-equality with the extension output. Without it, nothing validates the comment in _encode_blocks that the strict < tie-break "matches the CUDA key".
| raise ValueError("The ggml backend requires num_bits='iq1_s' or 'iq2_xs'") | ||
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| register_quant_backend("ggml", ggml_fake_quant) |
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Bot comment.
Nothing in the PR exercises this dispatcher: the unit tests call iq1_s_fake_quant/iq2_xs_fake_quant directly with a stub quantizer, so neither the registration, the num_bits routing, nor the ValueError branch is covered. A short CPU test in the style of tests/unit/torch/quantization/test_custom_backend.py — mtq.quantize on a Linear(256, 256) with {"num_bits": "iq1_s", "backend": "ggml"} — would cover the registration path and confirm the string num_bits survives QuantizerAttributeConfig validation and MaxCalibrator construction.
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Valid. 2320acd adds CPU end-to-end coverage through mtq.quantize for both formats. It covers package registration, string num_bits validation, backend routing, model forward, and the unknown-format error path.
| from .utils import update_quant_cfg_with_kv_cache_quant | ||
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| # Loading this before the core imports above creates a cycle through quantization.qtensor. | ||
| ggml = _import_module(".ggml", __name__) |
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The comment explains why this import must come last, but not why import_module is needed instead of from . import ggml at the bottom of the file (presumably to stop ruff/isort hoisting it back to the top). Please either say that in the comment or use the plainer from . import ggml # noqa: E402 + # isort: skip form, so the next reader doesn't "simplify" it back into the cycle.
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This is already addressed on the current head. The review was submitted against 0dda727; 2729267 added a comment that records both the import cycle and why the dynamic import prevents isort from hoisting it: quantization/__init__.py.
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Review follow-up is pushed in
Local checks: focused lint passed, all 14 CPU codec tests passed, and all 7 CUDA test cases collect. Runtime CUDA execution remains with GPU CI. |
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Addressed the #2446-scoped findings in
Two requested items need clarification:
No export or recipe code was changed for this review. Direct extension loading and kernel-boundary validation remain owned by #2448; #2446 owns the reference codecs, backend routing, and native-versus-reference integration checks. |
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Nudge: the prior round's code findings are all fixed, but the licensing call and the never-executed CUDA parity assertions still need a human.
Needs action:
- Get OSRB/code-owner sign-off on the ggml MIT codebook in
ggml/iq1_s.py/iq2_xs.pyand theLICENSEentry — legal call, not a bot approval. - Confirm GPU CI is green for
torch.equal(packed, reference)intests/gpu/torch/quantization/test_iq{1_s,2_xs}_cuda.py; the kernel'sfmafchains vs the referencematmulcan flip the strict-<argmin. PR body still says CUDA was collected, not run. - Confirm #2448 lands first:
ggml/iq1_s.pyimportsget_cuda_ext_iq1_sat module top, andextensions.pyon this base has no such symbol, soimport modelopt.torch.quantizationfails until then. - Assert the quantized forward differs from the unquantized one in
test_ggml_backend_via_quantize; shape +isfinitewould pass on a no-op backend.
No action needed:
- ✔️ 8 previous concerns resolved, including the per-forward search cost (now via
_quantizer_cache) and the CPU/CUDA IQ2_XS scale divergence (single Python predictor).
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| import torch | ||
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| from ..extensions import get_cuda_ext_iq1_s |
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[CRITICAL ModeState] get_cuda_ext_iq1_s does not exist in modelopt/torch/quantization/extensions.py on main (its __all__ is ["get_cuda_ext", "get_cuda_ext_fp8", "get_cuda_ext_mx", "precompile"]), and neither does get_cuda_ext_iq2_xs (ggml/iq2_xs.py:63). Because modelopt/torch/quantization/__init__.py imports .ggml unconditionally, this makes import modelopt.torch.quantization raise ImportError on this branch — i.e. the entire mtq public package (and everything downstream that touches it) is unimportable, not just the IQ path.
Why it matters: the PR body documents the merge order (#2448 → #2446), but as submitted this branch cannot pass CI, and the ordering becomes a hard invariant — if #2448 is ever reverted or lands partially, the library bricks at import time rather than degrading to the reference CPU encoder. That is also at odds with the project's plugin-laziness convention for optional native extensions.
Suggested fix, either:
- Rebase this PR onto [OMNIML-5899] Add CUDA kernels for IQ packing #2448 so the accessors exist in the diff under review, or
- Make the extension accessor lookup resilient so the reference encoder still works without the kernel PR, e.g. resolve it lazily at the call site inside
quantize_iq1_s:
def _cuda_ext():
from .. import extensions
getter = getattr(extensions, "get_cuda_ext_iq1_s", None)
return getter() if getter is not None else NoneOption 2 also keeps mtq importable in wheels built without the IQ kernels.
| for bit in range(7): | ||
| parity ^= (sign_index >> bit) & 1 | ||
| sign_mask = sign_index | (parity << 7) | ||
| bit_positions = torch.arange(8, dtype=torch.int64, device=blocks.device) | ||
| signs = 1.0 - 2.0 * ((sign_mask.unsqueeze(-1) >> bit_positions) & 1).float() | ||
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| scale_bytes = blocks[:, 66:].to(torch.int64) | ||
| local = torch.empty((blocks.shape[0], 16), dtype=torch.int64, device=blocks.device) | ||
| local[:, 0::2] = scale_bytes & 0x0F |
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[IMPORTANT Performance] dequantize_* runs on every forward (the cache only skips the encoder search, not the decode), but unlike the encoders it is completely unchunked and expands into 64-bit temporaries.
sign_mask.unsqueeze(-1) >> bit_positions materializes an int64 tensor of shape [nblocks, 32, 8] — that is 8 bytes per weight element — and & 1 allocates a second one before .float(). For one 8192×8192 layer (67M elements) that is ~536 MB + 536 MB + 268 MB, plus values/decoded at 268 MB each: well over 1 GB of transient allocation per linear per forward. dequantize_iq1_s:304 has the same shape (values/decoded at fp32 = 4 bytes/element, ~2–3× the weight). The 7-iteration parity loop above also allocates two int64 [nblocks, 32] temporaries per iteration.
This directly undercuts the care taken to cap encoder temporaries at ~16 MiB (_DEFAULT_BLOCK_CHUNK_SIZE), and it is the hot path — a QAT step or a calibration forward over a large model will OOM or thrash where the encoder would not.
Suggested fix: chunk the decode over blocks the same way _encode_blocks is chunked (the block_chunk_size already threaded through fake_quantize_with_cache can be reused), and keep the sign/index expansion in a narrow dtype. E.g.:
bit_positions = torch.arange(8, dtype=torch.int16, device=blocks.device)
signs = 1.0 - 2.0 * ((sign_mask.to(torch.int16).unsqueeze(-1) >> bit_positions) & 1).float()which cuts the two largest temporaries by 4×; combining that with per-chunk decode + write into a preallocated output bounds peak memory independent of weight size.
| @dataclass | ||
| class _PackedWeightCache: | ||
| input_ref: weakref.ReferenceType | ||
| input_key: tuple[object, ...] | ||
| format_name: str | ||
| block_chunk_size: int | ||
| packed_weights: torch.Tensor | ||
| weight_shape: torch.Tensor | ||
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[IMPORTANT Compatibility] _PackedWeightCache.input_ref stores a weakref.ReferenceType, and the instance is assigned to quantizer._quantizer_cache, i.e. it lands in an nn.Module.__dict__.
_quantizer_cache is listed in TensorQuantizer._skip_properties_for_save_restore, but that set is only consulted by the modelopt-state get/set (tensor_quantizer.py:1303,1360) — it does not filter plain pickling. nn.Module.__getstate__ returns self.__dict__ unfiltered, so after any forward pass the model is no longer picklable: torch.save(model, ...) (whole-module, not state_dict), pickle.dumps(model), or handing the model to a torch.multiprocessing/spawn worker all raise TypeError: cannot pickle 'weakref' object. Before this PR a quantized model has no unpicklable quantizer attributes, so this is a behavior regression that only appears once a ggml-backend forward has run — an unpleasant failure mode to debug.
Two things to fix:
- Make the cache pickle-transparent. Since it is purely runtime state, dropping it on serialization is correct:
@dataclass
class _PackedWeightCache:
input_ref: weakref.ReferenceType
input_key: tuple[object, ...]
format_name: str
block_chunk_size: int
packed_weights: torch.Tensor
weight_shape: torch.Tensor
def __reduce__(self):
# Runtime-only cache; never serialize (weakrefs are unpicklable).
return (_unpicklable_cache_placeholder, ())or simpler, have TensorQuantizer.__getstate__ strip _skip_properties_for_save_restore entries so every custom-backend cache benefits.
_PackedWeightCachedoes not derive from the exportedTensorQuantizerCacheprotocol that the existing custom-backend convention uses (seetests/unit/torch/quantization/test_custom_backend.py). Declaring it keeps the contract discoverable.
| def _input_cache_key(inputs: torch.Tensor) -> tuple[object, ...] | None: | ||
| try: | ||
| version = inputs._version | ||
| except RuntimeError: | ||
| # Inference tensors can omit version counters, so changes cannot be detected safely. | ||
| return None | ||
| return ( |
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[SUGGESTION] When _version is unavailable (weights that are themselves inference tensors, i.e. created inside torch.inference_mode()), _input_cache_key returns None, fake_quantize_with_cache sets _quantizer_cache = None, and every forward silently re-runs the full codebook grid search — 2048 entries × 16 scale choices for IQ1_S. That is a multiple-orders-of-magnitude slowdown with no signal to the user, and it looks identical to "just slow".
Consider either a one-time warnings.warn/warn_rank_0 on this path, or falling back to a key without the version counter (data_ptr/shape/stride/dtype/device plus the input_ref() is inputs identity check already gives strong protection against pointer reuse — the remaining gap is in-place mutation, which cannot happen to an inference tensor anyway).
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| # Imported last to register the backend without cycling through quantization.qtensor. | ||
| # A dynamic import prevents isort from hoisting it into the import block above. | ||
| ggml = _import_module(".ggml", __name__) | ||
| globals().update({name: getattr(ggml, name) for name in ggml.__all__}) |
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[SUGGESTION] This deviates from the documented convention in CONTRIBUTING ("Define the public API with __all__ and re-export via from .module import *"), and the stated justification looks unnecessary: .compress, .config, .conversion, and .model_quant above already import nn.modules.tensor_quantizer (and therefore qtensor) transitively, so by the point isort would place from .ggml import * — alphabetically between .conversion and .model_quant — there is no cycle left to trip on.
The cost of the globals().update(...) form is that mtq.quantize_iq1_s etc. are invisible to mypy, IDE completion, and Sphinx autodoc, and the injected names never reach a package-level __all__. If ordering really does need pinning, the standard mechanism expresses it without the indirection:
# Imported last so the backend registers after tensor_quantizer is fully loaded.
from .ggml import * # isort: skipIf the dynamic form is kept, please add a comment recording the concrete import cycle it avoids (which module pair), so the next person can tell whether it is still needed.
| def _encode_blocks( | ||
| blocks: torch.Tensor, grid: torch.Tensor, scales: torch.Tensor | None = None | ||
| ) -> torch.Tensor: | ||
| """Encode a moderate-size batch of flattened 256-value blocks.""" | ||
| x = torch.nan_to_num(blocks.float(), nan=0.0, posinf=0.0, neginf=0.0) | ||
| block_count = x.shape[0] | ||
| vectors = x.reshape(block_count, 32, 8) | ||
| magnitudes = vectors.abs() |
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[SUGGESTION] scales: torch.Tensor | None = None and the _predict_iq2_xs_scales(x) if scales is None else scales fallback are unreachable from production code — quantize_iq2_xs always precomputes and passes scales (both on the CUDA and the reference path), so only the unit tests exercise the None branch. Making the parameter required removes the second, drifting entry point to the scale predictor, which is exactly the "one Python-side scale predictor" invariant the PR description sets out to establish.
Relatedly, _encode_blocks already does torch.nan_to_num(blocks.float(), ...) at line 190 and _predict_iq2_xs_scales repeats it on input the caller has usually already sanitized — worth a short comment noting the predictor is also called directly on raw blocks from quantize_iq2_xs (line ~271), so the duplicate sanitization is intentional rather than redundant.
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Claude review — IQ codecs and ggml backend
Reviewed all 6 changed modelopt/ files in full plus tests/unit/torch/quantization/test_ggml_backend.py; skimmed the CPU/CUDA codec tests. Skipped LICENSE and .pre-commit-config.yaml (mechanical third-party-attribution wiring, which follows the CONTRIBUTING recipe correctly). 13 files changed total.
Findings: CRITICAL: 1, IMPORTANT: 2, SUGGESTION: 3
What I verified and found correct
I traced both codecs against the pinned llama.cpp revision and the round trip is faithful:
- Byte layouts match
block_iq1_s(2 + 32 + 16 = 50) andblock_iq2_xs(2 + 64 + 8 = 74), including little-endian FP16dand uint16 word packing. - Index/scale striding matches upstream in both directions. IQ1_S:
qs[ib*4 + l]↔low.reshape(-1, 8, 4),(qh[ib] >> 3l) & 7↔ the[0, 3, 6, 9]shift vector, and the encoder'sreshape(nb, 8, 4, 16).sum(dim=2)groups exactly the 4 vectors aqhword covers. IQ2_XS: the 16 nibble scales mapvector v -> local[v // 2]on both the encode (repeat_interleave(2)) and decode side, agreeing with upstream'sdb[l / 2]. - Dequantization math matches:
dl * (grid + delta)for IQ1_S, andd * (0.5 + ls) * 0.25 == d * (2*ls + 1) / 8for IQ2_XS._IQ1_S_NATIVE_MAX = 16.875(15 * 1.125) and_IQ2_XS_NATIVE_MAX = 43 * 31 / 8are both the correct full-range constants. - Error expansion in both encoders is algebraically right, including the IQ1_S delta terms (
||g + delta||^2 = ||g||^2 + 2*delta*sum(g) + 8*delta^2) and the IQ2_XS odd-parity sign-flip cost (sum(|x|*g) - 2*min_j(|x_j|*g_j)), withargminat selection time consistent with theaminused during the search. - Sign parity round-trips: the encoder flips one bit to force even parity over 8 bits, so dropping bit 7 (
& 0x7F) and recomputing it in the decoder is lossless. Flipping a zero-valued element is error-neutral, as it should be. - Cache invalidation is sound —
data_ptr+ shape + stride + dtype + device +_version, gated on a weakref identity check, correctly catchesload_state_dict,.to(device), and QAT in-place updates. num_bitsas a string is accepted:QuantizerAttributeConfig.num_bitsisint | tuple[int, int] | strandvalidate_num_bitsshort-circuits for custom backends._quantizer_cacheis already in_skip_properties_for_save_restore, so nomodelopt_stateschema change and no restore-fidelity problem.- Test coverage is good, and
test_ggml_backend_via_quantizeexercises the realmtq.quantizepath rather than mocks.
No algorithm-level correctness bug found. The issues below are integration and hot-path resource concerns.
Most impactful findings
1. CRITICAL — the branch does not import. ggml/iq1_s.py:65 and ggml/iq2_xs.py:63 import get_cuda_ext_iq1_s / get_cuda_ext_iq2_xs, neither of which exists in extensions.py on main. Since quantization/__init__.py imports .ggml unconditionally, import modelopt.torch.quantization raises ImportError — the whole mtq package, not just the IQ path. The documented merge order (#2448 first) explains this, but it means this PR cannot go green on its own, and the ordering becomes a hard invariant instead of degrading gracefully to the reference CPU encoder. Rebasing onto #2448, or resolving the accessor lazily, fixes it.
2. IMPORTANT — unbounded decode temporaries on the hot path. The cache elides the encoder search but dequantize_* still runs every forward, and it is entirely unchunked. sign_mask.unsqueeze(-1) >> bit_positions in dequantize_iq2_xs materializes int64 at 8 bytes per weight element (twice, before .float()); for one 8192x8192 layer that is >1 GB of transient allocation per forward. This undercuts the deliberate 16 MiB cap on the encoder temporaries. Chunking the decode and narrowing the sign expansion to int16 addresses it.
3. IMPORTANT — the weakref makes quantized models unpicklable. _PackedWeightCache holds a weakref.ReferenceType and is assigned into an nn.Module.__dict__. _skip_properties_for_save_restore is only honored by the modelopt-state path, not by nn.Module.__getstate__, so after any ggml forward torch.save(model, ...), pickle.dumps(model), and multiprocessing handoff raise TypeError: cannot pickle 'weakref' object. state_dict and deepcopy are unaffected, which makes this a latent, confusing regression.
Suggestions cover the globals().update() import shim in quantization/__init__.py, the silent full-re-encode fallback when _version is unavailable, and the unreachable scales=None branch in _encode_blocks.
Risk assessment
Medium-high, driven almost entirely by finding 1 rather than by the codec logic. The codecs themselves are careful, well-documented work that matches the pinned upstream format, are additive (new sub-package, no existing behavior or checkpoint schema touched), and are backed by real end-to-end tests. Once the stack ordering is resolved and the two hot-path resource issues are addressed, this is low risk to land. Note the PR correctly states that OSRB/code-owner sign-off on the embedded MIT codebooks is still outstanding and is not claimed here — that remains a human gate.
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To address the failing checks:
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The existing cases only proved the kernels run: any codebook entry, any bit offset, and any sign convention produce non-zero input-dependent bytes that differ per block, so a wrong index, a shifted qh field, or an inverted parity rule all passed. Add three cases per format that check the encoding itself: - test_cuda_ext_iq_encoding_is_optimal packs a random tensor, decodes the payload from the GGML field positions rather than from the kernel's own layout code, and asserts the reconstruction error equals the brute-force minimum over every local scale, delta sign, and codebook entry at the block scale the payload carries. Comparing achieved error rather than raw indices keeps it robust to the kernels' fused-multiply-add ordering reordering near-ties. This pins the payload layout, the search, and the block-wide reductions in one assertion. - test_cuda_ext_iq_input_dtype_equivalence packs values exact in every accepted dtype and requires byte-identical payloads. - test_cuda_ext_iq_non_finite_inputs_are_zeroed checks NaN and both infinities pack as zeros, and that a finite float64 outside the float32 range saturates instead -- a regression test for the narrowing fix. The codebooks are synthetic random grids rather than the GGML tables. The kernels treat the grid as an opaque argument, so this exercises the search identically while keeping the tests free of any dependency on the reference encoder or its tables, and a random grid has no ties to break. The decoder and the brute-force oracle were checked against an independent CPU packer written from the same specification, and against four injected layout bugs -- local scale off by one bit, dropped delta sign, sign mask at bit 8, swapped scale nibbles -- each of which the new assertion rejects. Parity against the PyTorch reference encoder still belongs with that encoder in #2446/#2450, and should compare dequantized error rather than bytes. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Signed-off-by: Chenjie Luo <chenjiel@nvidia.com>
## Summary - add native CUDA packing kernels for IQ1_S and IQ2_XS - load both extensions through the quantization extension module - validate caller metadata and launch bounds before contiguous materialization - normalize non-finite input elements consistently with the Python reference path - accept caller-computed IQ2_XS FP16 superblock scales to avoid a duplicate reduction - share common packing helpers and add direct extension compilation and boundary tests ## PR split This work is split into four focused PRs. Each PR targets `main` and owns a disjoint file set: 1. **Kernel** — [#2448: Add CUDA kernels for IQ packing](#2448) 2. **Quantization** — [#2446: Add IQ quantization codecs and backend](#2446) 3. **Export** — [#2447: Export IQ checkpoints from HF and Megatron](#2447) 4. **Recipes** — [#2449: Add IQ post-training quantization recipes](#2449) The required merge order is #2448, #2446, #2447, then #2449. ## Scope This PR owns only native kernel sources, shared packing helpers, extension loading and build registration, and direct extension tests. It does not contain Python codecs, export code, or recipes. ## GPU test coverage Direct kernel-boundary coverage is included in this PR: - [extension compilation, zero payloads, input validation, and row-alignment checks](https://github.com/NVIDIA/Model-Optimizer/blob/74e94db9601870e3569c7c8e73506a2f08c29da8/tests/gpu/_extensions/test_torch_extensions.py) Pack/dequantize numerical, native/reference byte-parity, and non-finite-policy tests are owned by the quantization PR: [IQ1_S](https://github.com/NVIDIA/Model-Optimizer/blob/e8d937081d8cd01cf8e44d43915df443b79deb17/tests/gpu/torch/quantization/test_iq1_s_cuda.py) and [IQ2_XS](https://github.com/NVIDIA/Model-Optimizer/blob/e8d937081d8cd01cf8e44d43915df443b79deb17/tests/gpu/torch/quantization/test_iq2_xs_cuda.py). ## Dependency behavior On `main`, this PR provides optional CUDA extension loaders and direct extension tests. The Python encoders and fallback dispatch land in #2446. Until #2446 lands, no quantization path calls these getters, so a load failure reports only that the extension is unavailable. The IQ2_XS packer accepts one caller-computed FP16 scale per 256-value block. #2446 owns that predictor and passes the same values to the native and reference encoders. ## Provenance - The CUDA kernels were independently written. - They implement the packed-format contract and sign-parity convention from the pinned [llama.cpp definition](https://github.com/ggml-org/llama.cpp/blob/9b05354ec6fb58b4e665e9a39ebc40285c015638/ggml/src/ggml-common.h). - `16.875 = 15 × (1 + 1/8)` is a derived IQ1_S constant. - `0.125` is part of the encoded format. - `0.61` is our empirical IQ1_S scale predictor, not copied from upstream code. - The IQ2_XS predictor constants are owned by #2446 and are not duplicated in this kernel. Human review is still required to confirm that the attribution and license treatment are sufficient. ## Validation - repository hooks, including native formatting, pass for all changed files - extension loader and test modules compile as Python - all 20 direct-extension and CUDA integration test cases collect locally - CUDA runtime execution is delegated to GPU CI because the local host is macOS - restricted-term scan passes --------- Signed-off-by: Hung-Yueh Chiang <hungyuehc@nvidia.com> Signed-off-by: Chenjie Luo <chenjiel@nvidia.com> Co-authored-by: Chenjie Luo <chenjiel@nvidia.com> Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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Rebase resolved the merge-order blocker (#2448 is on main, both extension getters exist), but two hot-path findings from the last round are still present in the diff and the licensing gate is unchanged.
Needs action:
- Make
_PackedWeightCachepickle-transparent inggml/common.py— the storedweakref.reflands innn.Module.__dict__, sotorch.save(model)/pickle.dumps(model)break after any ggml forward. See inline comment. - Bound the decode temporaries in
dequantize_iq2_xs/dequantize_iq1_s— theint64sign/index expansion is unchunked at 8 B per weight element on every forward, undoing the 16 MiB encoder budget. See inline comment. - Assert the quantized forward differs from the unquantized one in
test_ggml_backend_via_quantize; shape +isfinitepasses on a no-op backend. - Confirm GPU CI is green for
torch.equal(packed, reference)intests/gpu/torch/quantization/test_iq{1_s,2_xs}_cuda.py— PR body still says CUDA was collected, not run. - Get OSRB/code-owner sign-off on the ggml MIT codebook and the
LICENSEentry — legal call, not a bot approval.
No action needed:
- ✔️ Resolved since the last review: the #2448 merge-order import failure,
backend_extra_argsforwarding, CUDA grid-cache device normalization, and payload/shape validation.
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| @dataclass | ||
| class _PackedWeightCache: | ||
| input_ref: weakref.ReferenceType |
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Bot comment.
input_ref: weakref.ReferenceType is stored on an instance that gets assigned to quantizer._quantizer_cache, i.e. into an nn.Module.__dict__. _skip_properties_for_save_restore is only consulted by the modelopt-state get/set path (tensor_quantizer.py), not by nn.Module.__getstate__, which returns self.__dict__ unfiltered.
So after the first ggml forward, torch.save(model, ...) (whole module), pickle.dumps(model), and torch.multiprocessing/spawn handoff all raise TypeError: cannot pickle 'weakref' object. mto.save and state_dict are fine, which makes this a latent, confusing regression that only appears once the backend has run once.
Since the cache is pure runtime state, dropping it on serialization is correct — e.g. give _PackedWeightCache a __reduce__/__getstate__ that returns an empty cache, or store the identity guard as id(inputs) plus the existing key tuple instead of a weakref. A regression test that pickles a ggml-quantized model after a forward would pin it.
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Thanks for raising this. I do not think generic Python module serialization should block #2446. This PR supports IQ quantization and export through ModelOpt state and state_dict; _quantizer_cache is runtime-only, is not part of state_dict, and is already excluded from ModelOpt save/restore. The converted model also uses a dynamically generated QuantLinear that is not whole-model pickleable independently of this cache, so adding format-specific pickle behavior here would not make torch.save(model) or pickle.dumps(model) a supported end-to-end path. I am therefore leaving this unchanged and suggest tracking generic pickle or spawn support separately.
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| scale_bytes = blocks[:, 66:].to(torch.int64) | ||
| local = torch.empty((blocks.shape[0], 16), dtype=torch.int64, device=blocks.device) | ||
| local[:, 0::2] = scale_bytes & 0x0F |
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The _quantizer_cache added this round skips the encoder search, but dequantize_* still runs on every forward and is completely unchunked.
sign_mask.unsqueeze(-1) >> bit_positions with bit_positions as int64 materializes an [nblocks, 32, 8] int64 tensor — 8 bytes per weight element — and & 1 allocates a second one before .float(). For one 8192x8192 layer that is ~1 GB of transient allocation per forward, plus values/decoded at 268 MB each. dequantize_iq1_s has the same shape. This directly undercuts the deliberate ~16 MiB cap documented for the encoder temporaries.
Two cheap fixes: narrow the sign expansion (sign_mask.to(torch.int16) with an int16 bit_positions) for a 4x cut, and chunk the decode over blocks the same way _encode_blocks is chunked — block_chunk_size is already threaded through fake_quantize_with_cache, so it can be reused to bound peak memory independent of weight size.
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Inline comments:
In `@modelopt/torch/quantization/ggml/iq1_s.py`:
- Around line 168-170: The _encode_blocks function currently converts values to
float32 before sanitizing them, causing finite float64 values beyond the float32
range to become infinity and then zero. Normalize non-finite values in the
original blocks dtype, clamp finite values to the float32 representable range,
and only then convert to float32, preserving the existing CUDA load_float
behavior and limiting the change to the CPU/fallback path.
In `@modelopt/torch/quantization/ggml/iq2_xs.py`:
- Around line 174-190: Update the shared input normalization used by
_predict_iq2_xs_scales and _encode_blocks to sanitize NaN and infinities in the
source dtype, clamp finite values to torch.finfo(torch.float32).max, then
convert to float32. Reuse this normalization in both CPU paths so finite float64
values above float32 range saturate instead of becoming zero; leave the CUDA
extension call unchanged.
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Signed-off-by: Hung-Yueh Chiang <hungyuehc@nvidia.com>
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Nudge: the two hot-path findings from the last round are fixed, but the licensing call, the never-executed CUDA parity assertions, and the declined pickle finding all need a human.
Needs action:
- Get OSRB/code-owner sign-off on the ggml MIT codebook in
ggml/iq1_s.py/iq2_xs.pyand theLICENSEMIT entry — legal call, not a bot approval. - Confirm GPU CI is green for
torch.equal(packed, reference)intests/gpu/torch/quantization/test_iq{1_s,2_xs}_cuda.py; the PR body still says CUDA tests were collected, not run. - 💬 Author replied that
_PackedWeightCache'sweakrefis runtime-only and whole-model pickle is already unsupported forDynamicModule-converted models — reasonable, but please confirm that claim or file a follow-up, sincetorch.save(model)now fails only after a ggml forward. - Decide whether the float64→float32 saturation edge case in
_encode_blocks/_predict_iq2_xs_scales(CodeRabbit) is worth a clamp, or note it as out of scope.
No action needed:
- ✔️ Resolved since the last review: chunked decode in
dequantize_iq{1_s,2_xs}, the no-op-backend gap intest_ggml_backend_via_quantize, andbackend_extra_argsforwarding. - The PR body's
ggml/vsqtensordesign rationale addresses the in-repo alternative.
### What does this PR do? Type of change: Code refactoring `#2448` added the GGML IQ packing kernels as **two** torch extensions, `modelopt_cuda_ext_iq1_s` and `modelopt_cuda_ext_iq2_xs`. This merges them into one, `modelopt_cuda_ext_ggml`. The existing per-extension split in `extensions.py` exists for reasons that don't apply to the IQ formats: `get_cuda_ext` gates on CUDA `>=11` while `_fp8`/`_mx` gate on `>=11.8`, and `_mx` needs `--use_fast_math`, which must not reach the base `tensor_quant` kernels. `get_cuda_ext_iq1_s` and `get_cuda_ext_iq2_xs` differed in none of that — same `>=11.8` gate, same `-O3` flags, same `common.cuh` — so the split only compiled the shared header twice, ran nvcc twice, and grew the loader, `__getattr__`, and `precompile()` once per format. With IQ2_XXS / IQ3_S / IQ4_NL plausibly following, that scales badly. Changes: - New `ggml/ggml.cpp` holds both host-side validation wrappers and the single `PYBIND11_MODULE`, binding `iq1_s_pack` and `iq2_xs_pack` (previously each module exported a bare `pack`). Deletes `ggml/iq1_s.cpp` and `ggml/iq2_xs.cpp`; the validation logic and docstrings carry over unchanged. - `get_cuda_ext_iq1_s` + `get_cuda_ext_iq2_xs` → `get_cuda_ext_ggml`, which builds `ggml.cpp`, `iq1_s.cu`, and `iq2_xs.cu` together. The retry-on-`raise_if_failed` semantics of the old getters are preserved. - Each format keeps its kernels in its own translation unit, so adding a format is a new `.cu` plus one `module.def` — no new extension, loader, or `precompile()` line. No caller outside `extensions.py` and its tests referenced the old getters on `main`, so nothing else changes. **Note for the follow-up PRs in the `#2448` series (`#2446`/`#2447`/`#2449`): the codec layer should call `get_cuda_ext_ggml().iq1_s_pack(...)` / `.iq2_xs_pack(...)` instead of `get_cuda_ext_iq1_s().pack(...)` / `get_cuda_ext_iq2_xs().pack(...)`.** ### Usage ```python from modelopt.torch.quantization.extensions import get_cuda_ext_ggml ext = get_cuda_ext_ggml(raise_if_failed=True) iq1_s_payload = ext.iq1_s_pack(weight, iq1s_grid) # uint8 [numel / 256, 50] iq2_xs_payload = ext.iq2_xs_pack(weight, iq2xs_grid, scales) # uint8 [numel / 256, 74] ``` ### Testing Ran on a single H200 NVL (TRT-LLM `1.3.0rc27.dev202609170000` container), building the merged extension from scratch: - `pytest tests/gpu/_extensions/test_torch_extensions.py` — **24 passed** (6:44). This is the full existing IQ suite (zero-block layout, encode, dtype rejection, row-straddling rejection, invalid/negative-zero scales, byte-exact dtype equivalence, and the brute-force optimality round-trip) reparametrized onto the merged module, plus the untouched `modelopt_cuda_ext` / `_fp8` / `_mx` load tests. - Verified `precompile()` loads all four extensions and that the merged module exports exactly `iq1_s_pack` and `iq2_xs_pack` with the expected arities. - Off-GPU: compiled the three sources directly and linked them into one `.so` to confirm no duplicate-symbol collisions between the two `.cu` translation units. - `pre-commit run --files ...` passes on all changed files (ruff, mypy, clang-format, bandit, license headers). ### Before your PR is "*Ready for review*" - Is this change backward compatible?: ✅ — the removed getters were added in `#2448` (merged today, unreleased) and have no callers outside this file's own tests. - If you copied code from any other sources or added a new PIP dependency, did you follow guidance in `CONTRIBUTING.md`: N/A — no new code or dependencies; the moved wrappers keep their original attribution. - Did you write any new necessary tests?: ✅ — existing coverage reparametrized onto the merged module; no behavior change to test. - Did you update [Changelog](https://github.com/NVIDIA/Model-Optimizer/blob/main/CHANGELOG.rst)?: N/A — internal refactor of an unreleased, not-yet-wired-up API. - Did you get Claude approval on this PR?: ❌ — not yet run. ### Additional Information Follow-up to #2448. Merge before the remaining PRs in that series (#2446, #2447, #2449) land, so the codec layer is written against `get_cuda_ext_ggml` and no rename is needed afterwards. 🤖 Generated with [Claude Code](https://claude.com/claude-code) <!-- This is an auto-generated comment: release notes by coderabbit.ai --> ## Summary by CodeRabbit - **New Features** - Added IQ1_S packing support through the GGML CUDA extension. - Added a unified GGML extension loader for IQ1_S and IQ2_XS packing. - Improved extension loading reliability when a cached extension is unavailable. - **Changes** - Renamed the IQ2_XS packing binding from `pack` to `iq2_xs_pack`. - Consolidated IQ1_S and IQ2_XS extension access under the shared GGML loader. - Updated GPU validation and coverage to use the unified extension interface. <!-- end of auto-generated comment: release notes by coderabbit.ai --> Signed-off-by: Chenjie Luo <chenjiel@nvidia.com> Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
#2462 merged the two IQ packing extensions into one. get_cuda_ext_iq1_s and get_cuda_ext_iq2_xs are gone, replaced by get_cuda_ext_ggml, and the packer each exposed as `pack` is now `iq1_s_pack` / `iq2_xs_pack` on the shared module. Update both codecs and their CUDA tests accordingly. The monkeypatched fallback tests are unaffected in substance: each codec still imports the getter into its own module namespace, so patching it out isolates to one format. Verified on an RTX PRO 6000 Blackwell: 36 unit tests and 33 GPU tests, covering both codec parity suites and the extension-boundary suite. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Signed-off-by: Chenjie Luo <chenjiel@nvidia.com>
The two base64 blobs dominated the codec files: about 110 of the 333 lines in iq1_s.py and 116 of 353 in iq2_xs.py were opaque data a reviewer has to scroll past to reach the encoders. Move both tables, and the base64/zlib decoding that belongs with them, into ggml/codebooks.py. The codecs keep their public iq1_s_grid/iq2_xs_grid accessors, which are real logic -- device resolution, caching, and tensor shaping -- and now call iq1_s_grid_bytes/iq2_xs_grid_bytes for the raw data. This also bounds the third-party surface. The tables are the only GGML material reproduced in this package, so the MIT header travels with them and codebooks.py becomes the single file carrying it: iq1_s.py and iq2_xs.py go back to a plain Apache-2.0 header and come off the insert-license exclude list, which now names codebooks.py alone. Their module docstrings already cited the pinned ggml-common.h revision; those sentences now point at the new module instead of claiming the grid sits "below". Verified the move is lossless: both decoded grids are byte-identical to before, sha256 4ca82266881c8a77 for the [2048, 8] ternary table and 989f82d20f8b93e2 for the [512, 8] magnitude table. 36 unit tests and 33 GPU tests pass on an RTX PRO 6000 Blackwell. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Signed-off-by: Chenjie Luo <chenjiel@nvidia.com>
The CPU encoders converted with ``blocks.float()`` before ``nan_to_num``, so a finite float64 above the float32 range became infinity and then zero: a large weight silently encoded as nothing. Sanitize at the source precision instead and clamp to the float32 range, via a shared ``narrow_to_float32`` used by both ``_encode_blocks`` and ``_predict_iq2_xs_scales``. This closes a divergence introduced when the CUDA ``load_float`` helper gained the same fix: before that the two paths agreed by both zeroing, and afterwards only the extension saturated. For a [1, 256] float64 weight with one 1e100 element the two encoders disagreed outright -- CPU decoded it as -0.18, CUDA as 73728. The clamp applies only to float64. The float32 bounds do not fit in float16 or bfloat16, so clamping those would raise rather than no-op, and their finite range is already inside float32. Tests, guarding both the policy and the CPU/CUDA agreement: - narrow_to_float32 maps non-finite to zero and saturates out-of-range values - both CPU encoders pack such a weight identically to one clamped by hand, and differently from one zeroed by hand - both CUDA encoders do the same - float64 weights inside the float32 range pack byte-identically on both paths Byte parity is deliberately not asserted for out-of-range values: at those magnitudes the squared-error objective overflows to infinity in float32, every codebook candidate ties, and the two searches break the tie differently. The residual difference is two bytes in the affected block. Saturation is the property both paths can agree on. 39 unit tests and 37 GPU tests pass on an RTX PRO 6000 Blackwell. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Signed-off-by: Chenjie Luo <chenjiel@nvidia.com>
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Nudge: the code findings from the last round are fixed and the codebook extraction is a clear improvement, but the licensing call and two carried-over items still need a human.
Needs action:
- Get OSRB/code-owner sign-off on the ggml MIT codebook now isolated in
ggml/codebooks.py, its MIT notice, and theLICENSEMIT entry — legal call, not a bot approval. - Confirm GPU CI is green for
torch.equal(packed, reference)intests/gpu/torch/quantization/test_iq{1_s,2_xs}_cuda.py; a thread claims 37 GPU tests pass locally on Blackwell, but the PR body still says CUDA tests were only collected. - 💬 Author replied that
_PackedWeightCache'sweakrefis runtime-only and whole-model pickle is already unsupported for converted modules — confirm that claim or file a follow-up, sincetorch.save(model)fails only after a ggml forward.
No action needed:
- ✔️ Resolved since the last review: the float64→float32 saturation gap (shared
narrow_to_float32plus CPU/CUDA tests), and the single-extension accessorget_cuda_ext_ggml, which now exists onmain. - Codebook data moved to
ggml/codebooks.py, bounding the MIT-licensed surface to one file and theinsert-licenseexclusion to one entry.
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3 participants
Summary
PR split
This work is split into four focused PRs. Each PR targets
mainand owns a disjoint file set:The required merge order is #2448, #2446, #2447, then #2449.
Scope
This PR owns the Python codecs, backend dispatch, package registration, license attribution, CPU codec/backend tests, and CUDA numerical/reference-path tests. The native CUDA layer and direct extension tests remain in #2448; export and recipes remain in their own PRs.
Why the codecs are separate from
qtensorThe new
ggml/package contains stateless reference codecs and fake-quant backend functions. They transform ordinary tensors into packed format payloads and reconstruct tensors for fake quantization; they do not define persistent runtime quantized-tensor objects.BaseQuantizedTensorsubclasses underqtensor/own runtime tensor objects and execution dispatch. Keeping the codecs separate avoids claiming a runtime tensor contract that these formats do not yet provide. Aqtensortype can be added later if a runtime execution path requires one.Compatibility boundary
The Python encoders intentionally use fixed-scale, unweighted searches. They are not intended to reproduce another encoder's bytes for every input when that encoder performs iterative scale refinement or importance weighting. Compatibility is defined by the canonical codebooks, 50/74-byte payload layouts, and pinned dequantization formulas.
IQ2_XS computes the FP16 superblock scale once in the Python predictor and passes it to the CUDA packer. This removes a duplicate floating-point reduction and makes native/reference byte parity use the same scale. Non-finite input elements are treated as zero during packing in both implementations.
The unit tests construct nonzero payload fields independently and validate metadata, signs, local scales, and global scales. The CUDA tests compare native packed bytes with this Python reference encoder.
Test coverage
Licensing
The embedded codebook data cites the pinned upstream MIT source, carries its license notice, and uses the repository's third-party license mechanism. Human OSRB/code-owner confirmation is still required; this PR does not claim that approval.
Validation
Summary by CodeRabbit
New Features
Tests