From 1aec858a278e0e476002a7db7be95e522062d245 Mon Sep 17 00:00:00 2001 From: Matthew Schneider Date: Thu, 17 Sep 2026 12:55:32 -0400 Subject: [PATCH 1/2] Clear the `stp` slot in the frame when performing OSR --- src/engine/compiler/SinglePassCompiler.v3 | 4 ++++ test/wizeng/osr_gc.wasm | Bin 0 -> 104 bytes test/wizeng/osr_gc.wasm.exit | 1 + test/wizeng/osr_gc.wasm.flags | 1 + test/wizeng/osr_gc.wat | 7 +++++++ 5 files changed, 13 insertions(+) create mode 100644 test/wizeng/osr_gc.wasm create mode 100644 test/wizeng/osr_gc.wasm.exit create mode 100644 test/wizeng/osr_gc.wasm.flags create mode 100644 test/wizeng/osr_gc.wat diff --git a/src/engine/compiler/SinglePassCompiler.v3 b/src/engine/compiler/SinglePassCompiler.v3 index 8c80f86d6..b35a692ea 100644 --- a/src/engine/compiler/SinglePassCompiler.v3 +++ b/src/engine/compiler/SinglePassCompiler.v3 @@ -2146,6 +2146,10 @@ class SinglePassCompiler(xenv: SpcExecEnv, masm: MacroAssembler, regAlloc: RegAl if (Trace.compiler) Trace.OUT.put1(" OSR (+%d)", osr_entry_label.create_pos).ln(); masm.bindLabel(osr_entry_label); emit_reload_regs(); + // The interpreter's frame has its sidetable pointer in this slot + if (SpcTuning.inlineWhammProbes && SpcTuning.intrinsifyWhammProbe) { + masm.emit_mov_m_l(frame.inlined_instance_slot, 0); + } for (i < u32.!(state.length)) { var sv = state[i]; var iv = SpcVal(sv.kindFlags(IS_STORED | TAG_STORED), NO_REG, 0); diff --git a/test/wizeng/osr_gc.wasm b/test/wizeng/osr_gc.wasm new file mode 100644 index 0000000000000000000000000000000000000000..e640d4031b1ac731b1f711da8dbfd9f093fc0aa6 GIT binary patch literal 104 zcmXBFF$%&k0EW@;Phu@C1wq8cK|F~aJw+Qr43Q>+9RwGz?%-P Date: Thu, 24 Sep 2026 18:00:49 -0400 Subject: [PATCH 2/2] Move comment --- src/engine/compiler/SinglePassCompiler.v3 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/engine/compiler/SinglePassCompiler.v3 b/src/engine/compiler/SinglePassCompiler.v3 index 186b25b7e..aca601973 100644 --- a/src/engine/compiler/SinglePassCompiler.v3 +++ b/src/engine/compiler/SinglePassCompiler.v3 @@ -2127,8 +2127,8 @@ class SinglePassCompiler(xenv: SpcExecEnv, masm: MacroAssembler, regAlloc: RegAl if (Trace.compiler) Trace.OUT.put1(" OSR (+%d)", osr_entry_label.create_pos).ln(); masm.bindLabel(osr_entry_label); emit_reload_regs(); - // The interpreter's frame has its sidetable pointer in this slot if (SpcTuning.inlineWhammProbes && SpcTuning.intrinsifyWhammProbe) { + // Clear sidetable pointer in this slot masm.emit_mov_m_l(frame.inlined_instance_slot, 0); } for (i < u32.!(state.length)) {