From 89c5352215756ac2e9e082731bccf2f1905b48eb Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 30 Sep 2026 16:47:14 +0100 Subject: [PATCH 1/2] media: sony-starvis2: Only update bits for window mode IMX585 requires bit 4 of the WINMODE register (0x3018) to be set, whilst the bottom nibble selects between all-pixel and window mode. Switch to using cci_update_bits so that only the bottom nibble is updated, thereby working on all supported Starvis2 sensors. Signed-off-by: Dave Stevenson --- drivers/media/i2c/sony-starvis2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/sony-starvis2.c b/drivers/media/i2c/sony-starvis2.c index c0d3875f00490..343ea4ae8e2bd 100644 --- a/drivers/media/i2c/sony-starvis2.c +++ b/drivers/media/i2c/sony-starvis2.c @@ -99,6 +99,7 @@ MODULE_PARM_DESC(hcg_mode, "Enable HCG mode"); /* Crop */ #define STARVIS2_REG_WINMODE CCI_REG8(0x3018) +#define STARVIS2_REG_WINMODE_MASK 0x0f #define STARVIS2_REG_PIX_HST CCI_REG16_LE(0x303c) #define STARVIS2_REG_PIX_HWIDTH CCI_REG16_LE(0x303e) #define STARVIS2_REG_PIX_VST CCI_REG16_LE(0x3044) @@ -1911,7 +1912,8 @@ static int starvis2_program_window(struct starvis2 *starvis2, int ret = 0; cci_write(starvis2->cci, STARVIS2_REG_ADDMODE, 0x00, &ret); - cci_write(starvis2->cci, STARVIS2_REG_WINMODE, 0x04, &ret); + cci_update_bits(starvis2->cci, STARVIS2_REG_WINMODE, + STARVIS2_REG_WINMODE_MASK, 0x04, &ret); cci_write(starvis2->cci, STARVIS2_REG_PIX_HST, crop->left - starvis2->variant->active_area.left, &ret); cci_write(starvis2->cci, STARVIS2_REG_PIX_HWIDTH, crop->width, &ret); From f67232ac67a40f0e57bbe69113b8d3b981a672d2 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 30 Sep 2026 17:11:29 +0100 Subject: [PATCH 2/2] media: sony-starvis2: Fixup imx585 configuration The common registers and minimum HMAX values merged for IMX585 were incorrect. Validate against the information from Sony, and confirmed working. Fixes: bcb59d4f4afe ("media: sony-starvis2: Add support for IMX585") Signed-off-by: Dave Stevenson --- drivers/media/i2c/sony-starvis2.c | 601 ++++++++++++------------------ 1 file changed, 233 insertions(+), 368 deletions(-) diff --git a/drivers/media/i2c/sony-starvis2.c b/drivers/media/i2c/sony-starvis2.c index 343ea4ae8e2bd..ad7d568587442 100644 --- a/drivers/media/i2c/sony-starvis2.c +++ b/drivers/media/i2c/sony-starvis2.c @@ -1094,385 +1094,250 @@ static const struct cci_reg_sequence imx585_common_regs[] = { { STARVIS2_REG_VCMODE, 0x01 }, { CCI_REG8(0x306b), 0x00 }, { STARVIS2_REG_GAIN_PGC_FIDMD, 0x01 }, - { CCI_REG8(0x3460), 0x22 }, - { CCI_REG8(0x355a), 0x64 }, - { CCI_REG8(0x3a02), 0x7a }, - { CCI_REG8(0x3a10), 0xec }, - { CCI_REG8(0x3a12), 0x71 }, - { CCI_REG8(0x3a14), 0xde }, - { CCI_REG8(0x3a20), 0x2b }, - { CCI_REG8(0x3a24), 0x22 }, - { CCI_REG8(0x3a25), 0x25 }, - { CCI_REG8(0x3a26), 0x2a }, - { CCI_REG8(0x3a27), 0x2c }, - { CCI_REG8(0x3a28), 0x39 }, - { CCI_REG8(0x3a29), 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CCI_REG8(0x4648), 0x82 }, - { CCI_REG8(0x4649), 0x01 }, - { CCI_REG8(0x464a), 0xab }, - { CCI_REG8(0x464b), 0x01 }, - { CCI_REG8(0x464c), 0x26 }, - { CCI_REG8(0x464e), 0x30 }, - { CCI_REG8(0x4654), 0xfc }, - { CCI_REG8(0x4656), 0x08 }, - { CCI_REG8(0x4658), 0x12 }, - { CCI_REG8(0x465a), 0x25 }, - { CCI_REG8(0x4662), 0xfc }, - { CCI_REG8(0x46a2), 0xfb }, - { CCI_REG8(0x46d6), 0xf3 }, - { CCI_REG8(0x46e6), 0x00 }, - { CCI_REG8(0x46e8), 0xff }, - { CCI_REG8(0x46e9), 0x03 }, - { CCI_REG8(0x46ec), 0x7a }, - { CCI_REG8(0x46ee), 0xe5 }, - { CCI_REG8(0x46f4), 0xee }, - { CCI_REG8(0x46f6), 0xf2 }, - { CCI_REG8(0x470c), 0xff }, - { CCI_REG8(0x470d), 0x03 }, - { CCI_REG8(0x470e), 0x00 }, - { CCI_REG8(0x4714), 0xe0 }, - { CCI_REG8(0x4716), 0xe4 }, - { CCI_REG8(0x471e), 0xed }, - { CCI_REG8(0x472e), 0x00 }, - { CCI_REG8(0x4730), 0xff }, - { CCI_REG8(0x4731), 0x03 }, - { CCI_REG8(0x4734), 0x7b }, - { CCI_REG8(0x4736), 0xdf }, - { CCI_REG8(0x4754), 0x7d }, - { CCI_REG8(0x4756), 0x8b }, - { CCI_REG8(0x4758), 0x93 }, - { CCI_REG8(0x475a), 0xb1 }, - { CCI_REG8(0x475c), 0xfb }, - { CCI_REG8(0x475e), 0x09 }, - { CCI_REG8(0x4760), 0x11 }, - { CCI_REG8(0x4762), 0x2f }, - { CCI_REG8(0x4766), 0xcc }, - { CCI_REG8(0x4776), 0xcb }, - { CCI_REG8(0x477e), 0x4a }, - { CCI_REG8(0x478e), 0x49 }, - { CCI_REG8(0x4794), 0x7c }, - { CCI_REG8(0x4796), 0x8f }, - { CCI_REG8(0x4798), 0xb3 }, - { CCI_REG8(0x4799), 0x00 }, - { CCI_REG8(0x479a), 0xcc }, - { CCI_REG8(0x479c), 0xc1 }, - { CCI_REG8(0x479e), 0xcb }, - { CCI_REG8(0x47a4), 0x7d }, - { CCI_REG8(0x47a6), 0x8e }, - { CCI_REG8(0x47a8), 0xb4 }, - { CCI_REG8(0x47a9), 0x00 }, - { CCI_REG8(0x47aa), 0xc0 }, - { CCI_REG8(0x47ac), 0xfa }, - { CCI_REG8(0x47ae), 0x0d }, - { CCI_REG8(0x47b0), 0x31 }, - { CCI_REG8(0x47b1), 0x01 }, - { CCI_REG8(0x47b2), 0x4a }, - { CCI_REG8(0x47b3), 0x01 }, - { CCI_REG8(0x47b4), 0x3f }, - { CCI_REG8(0x47b6), 0x49 }, - { CCI_REG8(0x47bc), 0xfb }, - { CCI_REG8(0x47be), 0x0c }, - { CCI_REG8(0x47c0), 0x32 }, - { CCI_REG8(0x47c1), 0x01 }, - { CCI_REG8(0x47c2), 0x3e }, - { CCI_REG8(0x47c3), 0x01 }, + { CCI_REG8(0x3b2c), 0x0c }, + { CCI_REG8(0x3b30), 0x1c }, + { CCI_REG8(0x3b34), 0x0c }, + { CCI_REG8(0x3b38), 0x1c }, + { CCI_REG8(0x3ba0), 0x0c }, + { CCI_REG8(0x3ba4), 0x1c }, + { CCI_REG8(0x3ba8), 0x0c }, + { CCI_REG8(0x3bac), 0x1c }, + { CCI_REG8(0x3d3c), 0x11 }, + { CCI_REG8(0x3d46), 0x0b }, + { CCI_REG8(0x3de0), 0x3f }, + { CCI_REG8(0x3de1), 0x08 }, + { CCI_REG8(0x3e10), 0x10 }, + { CCI_REG8(0x3e14), 0x87 }, + { CCI_REG8(0x3e16), 0x91 }, + { CCI_REG8(0x3e18), 0x91 }, + { CCI_REG8(0x3e1a), 0x87 }, + { CCI_REG8(0x3e1c), 0x78 }, + { CCI_REG8(0x3e1e), 0x50 }, + { CCI_REG8(0x3e20), 0x50 }, + { CCI_REG8(0x3e22), 0x50 }, + { CCI_REG8(0x3e24), 0x87 }, + { CCI_REG8(0x3e26), 0x91 }, + { CCI_REG8(0x3e28), 0x91 }, + { CCI_REG8(0x3e2a), 0x87 }, + { CCI_REG8(0x3e2c), 0x78 }, + { CCI_REG8(0x3e2e), 0x50 }, + { CCI_REG8(0x3e30), 0x50 }, + { CCI_REG8(0x3e32), 0x50 }, + { CCI_REG8(0x3e34), 0x87 }, + { CCI_REG8(0x3e36), 0x91 }, + { CCI_REG8(0x3e38), 0x91 }, + { CCI_REG8(0x3e3a), 0x87 }, + { CCI_REG8(0x3e3c), 0x78 }, + { CCI_REG8(0x3e3e), 0x50 }, + { CCI_REG8(0x3e40), 0x50 }, + { CCI_REG8(0x3e42), 0x50 }, + { CCI_REG8(0x4054), 0x64 }, + { CCI_REG8(0x4148), 0xfe }, + { CCI_REG8(0x4149), 0x05 }, + { CCI_REG8(0x414a), 0xff }, + { CCI_REG8(0x414b), 0x05 }, + { CCI_REG8(0x420a), 0x03 }, + { CCI_REG8(0x4231), 0x08 }, + { CCI_REG8(0x423d), 0x9c }, + { CCI_REG8(0x4242), 0xb4 }, + { CCI_REG8(0x4246), 0xb4 }, + { CCI_REG8(0x424e), 0xb4 }, + { CCI_REG8(0x425c), 0xb4 }, + { CCI_REG8(0x425e), 0xb6 }, + { CCI_REG8(0x426c), 0xb4 }, + { CCI_REG8(0x426e), 0xb6 }, + { CCI_REG8(0x428c), 0xb4 }, + { CCI_REG8(0x428e), 0xb6 }, + { CCI_REG8(0x4708), 0x00 }, + { CCI_REG8(0x4709), 0x00 }, + { CCI_REG8(0x470a), 0xff }, + { CCI_REG8(0x470b), 0x03 }, + { CCI_REG8(0x470c), 0x00 }, + { CCI_REG8(0x470d), 0x00 }, + { CCI_REG8(0x470e), 0xff }, + { CCI_REG8(0x470f), 0x03 }, + { CCI_REG8(0x47eb), 0x1c }, + { CCI_REG8(0x47f0), 0xa6 }, + { CCI_REG8(0x47f2), 0xa6 }, + { CCI_REG8(0x47f4), 0xa0 }, + { CCI_REG8(0x47f6), 0x96 }, + { CCI_REG8(0x4808), 0xa6 }, + { CCI_REG8(0x480a), 0xa6 }, + { CCI_REG8(0x480c), 0xa0 }, + { CCI_REG8(0x480e), 0x96 }, + { CCI_REG8(0x492c), 0xb2 }, + { CCI_REG8(0x4930), 0x03 }, + { CCI_REG8(0x4932), 0x03 }, + { CCI_REG8(0x4936), 0x5b }, + { CCI_REG8(0x4938), 0x82 }, + { CCI_REG8(0x493c), 0x23 }, + { CCI_REG8(0x493e), 0x23 }, + { CCI_REG8(0x4940), 0x23 }, + { CCI_REG8(0x4ba8), 0x1c }, + { CCI_REG8(0x4ba9), 0x03 }, + { CCI_REG8(0x4bac), 0x1c }, + { CCI_REG8(0x4bad), 0x1c }, + { CCI_REG8(0x4bae), 0x1c }, + { CCI_REG8(0x4baf), 0x1c }, + { CCI_REG8(0x4bb0), 0x1c }, + { CCI_REG8(0x4bb1), 0x1c }, + { CCI_REG8(0x4bb2), 0x1c }, + { CCI_REG8(0x4bb3), 0x1c }, + { CCI_REG8(0x4bb4), 0x1c }, + { CCI_REG8(0x4bb8), 0x03 }, + { CCI_REG8(0x4bb9), 0x03 }, + { CCI_REG8(0x4bba), 0x03 }, + { CCI_REG8(0x4bbb), 0x03 }, + { CCI_REG8(0x4bbc), 0x03 }, + { CCI_REG8(0x4bbd), 0x03 }, + { CCI_REG8(0x4bbe), 0x03 }, + { CCI_REG8(0x4bbf), 0x03 }, + { CCI_REG8(0x4bc0), 0x03 }, + { CCI_REG8(0x4c14), 0x87 }, + { CCI_REG8(0x4c16), 0x91 }, + { CCI_REG8(0x4c18), 0x91 }, + { CCI_REG8(0x4c1a), 0x87 }, + { CCI_REG8(0x4c1c), 0x78 }, + { CCI_REG8(0x4c1e), 0x50 }, + { CCI_REG8(0x4c20), 0x50 }, + { CCI_REG8(0x4c22), 0x50 }, + { CCI_REG8(0x4c24), 0x87 }, + { CCI_REG8(0x4c26), 0x91 }, + { CCI_REG8(0x4c28), 0x91 }, + { CCI_REG8(0x4c2a), 0x87 }, + { CCI_REG8(0x4c2c), 0x78 }, + { CCI_REG8(0x4c2e), 0x50 }, + { CCI_REG8(0x4c30), 0x50 }, + { CCI_REG8(0x4c32), 0x50 }, + { CCI_REG8(0x4c34), 0x87 }, + { CCI_REG8(0x4c36), 0x91 }, + { CCI_REG8(0x4c38), 0x91 }, + { CCI_REG8(0x4c3a), 0x87 }, + { CCI_REG8(0x4c3c), 0x78 }, + { CCI_REG8(0x4c3e), 0x50 }, + { CCI_REG8(0x4c40), 0x50 }, + { CCI_REG8(0x4c42), 0x50 }, + { CCI_REG8(0x4d12), 0x1f }, + { CCI_REG8(0x4d13), 0x1e }, + { CCI_REG8(0x4d26), 0x33 }, + { CCI_REG8(0x4e0e), 0x59 }, + { CCI_REG8(0x4e14), 0x55 }, + { CCI_REG8(0x4e16), 0x59 }, + { CCI_REG8(0x4e1e), 0x3b }, + { CCI_REG8(0x4e20), 0x47 }, + { CCI_REG8(0x4e22), 0x54 }, + { CCI_REG8(0x4e26), 0x81 }, + { CCI_REG8(0x4e2c), 0x7d }, + { CCI_REG8(0x4e2e), 0x81 }, + { CCI_REG8(0x4e36), 0x63 }, + { CCI_REG8(0x4e38), 0x6f }, + { CCI_REG8(0x4e3a), 0x7c }, + { CCI_REG8(0x4f3a), 0x3c }, + { CCI_REG8(0x4f3c), 0x46 }, + { CCI_REG8(0x4f3e), 0x59 }, + { CCI_REG8(0x4f42), 0x64 }, + { CCI_REG8(0x4f44), 0x6e }, + { CCI_REG8(0x4f46), 0x81 }, + { CCI_REG8(0x4f4a), 0x82 }, + { CCI_REG8(0x4f5a), 0x81 }, + { CCI_REG8(0x4f62), 0xaa }, + { CCI_REG8(0x4f72), 0xa9 }, + { CCI_REG8(0x4f78), 0x36 }, + { CCI_REG8(0x4f7a), 0x41 }, + { CCI_REG8(0x4f7c), 0x61 }, + { CCI_REG8(0x4f7d), 0x01 }, + { CCI_REG8(0x4f7e), 0x7c }, + { CCI_REG8(0x4f7f), 0x01 }, + { CCI_REG8(0x4f80), 0x77 }, + { CCI_REG8(0x4f82), 0x7b }, + { CCI_REG8(0x4f88), 0x37 }, + { CCI_REG8(0x4f8a), 0x40 }, + { CCI_REG8(0x4f8c), 0x62 }, + { CCI_REG8(0x4f8d), 0x01 }, + { CCI_REG8(0x4f8e), 0x76 }, + { CCI_REG8(0x4f8f), 0x01 }, + { CCI_REG8(0x4f90), 0x5e }, + { CCI_REG8(0x4f91), 0x02 }, + { CCI_REG8(0x4f92), 0x69 }, + { CCI_REG8(0x4f93), 0x02 }, + { CCI_REG8(0x4f94), 0x89 }, + { CCI_REG8(0x4f95), 0x02 }, + { CCI_REG8(0x4f96), 0xa4 }, + { CCI_REG8(0x4f97), 0x02 }, + { CCI_REG8(0x4f98), 0x9f }, + { CCI_REG8(0x4f99), 0x02 }, + { CCI_REG8(0x4f9a), 0xa3 }, + { CCI_REG8(0x4f9b), 0x02 }, + { CCI_REG8(0x4fa0), 0x5f }, + { CCI_REG8(0x4fa1), 0x02 }, + { CCI_REG8(0x4fa2), 0x68 }, + { CCI_REG8(0x4fa3), 0x02 }, + { CCI_REG8(0x4fa4), 0x8a }, + { CCI_REG8(0x4fa5), 0x02 }, + { CCI_REG8(0x4fa6), 0x9e }, + { CCI_REG8(0x4fa7), 0x02 }, + { CCI_REG8(0x519e), 0x79 }, + { CCI_REG8(0x51a6), 0xa1 }, + { CCI_REG8(0x51f0), 0xac }, + { CCI_REG8(0x51f2), 0xaa }, + { CCI_REG8(0x51f4), 0xa5 }, + { CCI_REG8(0x51f6), 0xa0 }, + { CCI_REG8(0x5200), 0x9b }, + { CCI_REG8(0x5202), 0x91 }, + { CCI_REG8(0x5204), 0x87 }, + { CCI_REG8(0x5206), 0x82 }, + { CCI_REG8(0x5208), 0xac }, + { CCI_REG8(0x520a), 0xaa }, + { CCI_REG8(0x520c), 0xa5 }, + { CCI_REG8(0x520e), 0xa0 }, + { CCI_REG8(0x5210), 0x9b }, + { CCI_REG8(0x5212), 0x91 }, + { CCI_REG8(0x5214), 0x87 }, + { CCI_REG8(0x5216), 0x82 }, + { CCI_REG8(0x5218), 0xac }, + { CCI_REG8(0x521a), 0xaa }, + { CCI_REG8(0x521c), 0xa5 }, + { CCI_REG8(0x521e), 0xa0 }, + { CCI_REG8(0x5220), 0x9b }, + { CCI_REG8(0x5222), 0x91 }, + { CCI_REG8(0x5224), 0x87 }, + { CCI_REG8(0x5226), 0x82 }, + { CCI_REG8(0x5b3c), 0x07 }, + { STARVIS2_REG_WDMODE, 0x00 }, { STARVIS2_REG_MDBIT, 0x01 }, { STARVIS2_REG_XXS_DRV, 0x00 }, }; static const u16 imx585_min_hmax_2lane[] = { - [STARVIS2_LINK_FREQ_297MHZ] = 1980, - [STARVIS2_LINK_FREQ_360MHZ] = 1980, - [STARVIS2_LINK_FREQ_445MHZ] = 1188, - [STARVIS2_LINK_FREQ_594MHZ] = 990, - [STARVIS2_LINK_FREQ_720MHZ] = 990, - [STARVIS2_LINK_FREQ_891MHZ] = 990, - [STARVIS2_LINK_FREQ_1039MHZ] = 990, - [STARVIS2_LINK_FREQ_1188MHZ] = 990, + [STARVIS2_LINK_FREQ_297MHZ] = 2984, + [STARVIS2_LINK_FREQ_360MHZ] = 2464, + [STARVIS2_LINK_FREQ_445MHZ] = 2004, + [STARVIS2_LINK_FREQ_594MHZ] = 1512, + [STARVIS2_LINK_FREQ_720MHZ] = 1226, + [STARVIS2_LINK_FREQ_891MHZ] = 996, + [STARVIS2_LINK_FREQ_1039MHZ] = 856, + [STARVIS2_LINK_FREQ_1188MHZ] = 856, }; const struct starvis2_variant imx585_variant_def = {