From 0af8337d6ad941491851ec5a51215d7402fe83e9 Mon Sep 17 00:00:00 2001 From: Claude Date: Fri, 14 Aug 2026 08:53:38 +0000 Subject: [PATCH] Fix MDX compile error from unescaped < before digit MDX parses `<` as the start of a JSX tag; `<30%` in prose fails because a digit can't start a tag name. Reworded to avoid the literal `<` character. --- docs/operations/optimize-edge-ai-power-performance.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/operations/optimize-edge-ai-power-performance.md b/docs/operations/optimize-edge-ai-power-performance.md index 17bd7bf0..7d8f89bb 100644 --- a/docs/operations/optimize-edge-ai-power-performance.md +++ b/docs/operations/optimize-edge-ai-power-performance.md @@ -45,7 +45,7 @@ Implement power-aware AI inference strategies for edge devices that dynamically - **Defer non-urgent inference**: Queue and batch low-priority inference requests to run during optimal power conditions (e.g., when device is charging or plugged in). - **Thermal-aware throttling**: Monitor device temperature and reduce inference frequency or model complexity before hardware throttling occurs. -- **Battery-level policies**: Implement tiered power policies that progressively reduce AI workload intensity as battery depletes (e.g., 100-70%: full performance, 70-30%: reduced frequency, <30%: minimal/disabled). +- **Battery-level policies**: Implement tiered power policies that progressively reduce AI workload intensity as battery depletes (e.g., 100-70%: full performance, 70-30%: reduced frequency, below 30%: minimal/disabled). - **Enable dynamic voltage and frequency scaling (DVFS)**: Configure hardware to operate at lower frequencies when peak performance isn't needed. - **Account for mixed-signal accelerator sensitivity**: Analog and mixed-signal AI accelerators exhibit performance that varies with process, voltage, and temperature (PVT). This is usually mitigated during hardware-aware training, but it still matters at inference in deployed systems—accuracy and energy can drift as temperature or supply voltage change. Prefer routing work to such accelerators within their validated operating envelope, and in a heterogeneous system fall back to a more robust (e.g. digital) compute unit when conditions move outside it. - **Schedule across heterogeneous compute units**: With CPUs, GPUs, NPUs, and non-von-Neumann accelerators increasingly present on the same edge device, treat scheduling as a placement decision—dispatch each request to the unit offering the best energy-per-inference for the current accuracy target and operating conditions, not just to a single default processor.